Second, high power NTC thermal gold electrodes chip / silver electrode wafer packaging key technology.

High power NTC thermal gold electrodes chip/silver electrode wafer packaging mainly involves the light, heat, electricity, structure and technology and so on, as shown in figure 1 below. These factors is independent of each other, and influence each other. Among them, the light is NTC thermal gold electrodes chip/silver electrode chip encapsulates the purpose, heat is the key, electricity, structure and technology is a means, and the performance is encapsulated embodies the level. In process and reduce the production cost for compatibility, NTC thermal gold electrodes chip/silver electrode wafer packaging design should be and chip design simultaneously, namely chip design should be considering the encapsulation structure and process. Otherwise, such as chip manufacturing finish, may be due to the needs of the encapsulation of chip structure adjustment, extending a product development cycle and process cost, and sometimes impossible.

In particular, the high power NTC thermal gold electrodes chip/silver electrode chip encapsulates the key technologies, including:

(a) low thermal resistance encapsulation technology
For existing NTC thermal gold electrodes chip / silver electrode chip efficacy level, because about 80% of the power input into quantity of heat, and thermal NTC gold electrodes chip/silver electrode chip chip area is small, therefore, chip heat is NTC thermal gold electrodes chip/silver electrode wafer packaging must solve the key problem. Mainly includes chip layout, packaging material selection substrate materials, thermal interface materials) and technology, heat sink design, etc.

NTC thermal gold electrodes chip/silver electrode wafer packaging thermal resistance include material (heat dissipation substrate and heat sink structure) internal heat resistance and thermal resistance interface. Heat dissipation of the substrate role is to absorb heat generation of chip, and transmitted to the heat sink, realize the heat exchanger with the outside world. Commonly used heat dissipation substrate materials including silicon, metal (such as aluminum, copper), ceramic (such as, AlN, SiC) and composite materials. As the third generation Nichia company NTC thermal gold electrodes chip/silver electrode chips using CuW do underlay, will be 1 mm chip in the inversion CuW substrate, reduce the encapsulation thermal resistance and improve the semiconductor thermal power and efficiency; Lamina Ceramics company is developed low temperature co-firing ceramic to metal substrate, as shown in figure 2 (a), and develops the corresponding NTC thermal gold electrodes chip/silver electrode wafer packaging technology. The technology is suitable for the first preparation eutectic solder's high power NTC thermal gold electrodes chip/silver electrode chip chip and the corresponding ceramic substrates, and then summing NTC gold electrodes chip/silver electrode chips and substrate chip directly welded together. Because the base board honshui became eutectic solder layer, esd protection circuit, drive circuit and control circuit compensation, not only simple structure, and because the material high thermal conductivity, thermal interface less, greatly improving the thermal performance, for high-power NTC thermal gold electrodes chip/silver electrode array (chip is proposed. Germany Curmilk company developed high thermal conductivity of the copper ceramic board, by the ceramic substrates (AlN or) and conductive layer (Cu) high temperature under high pressure sintering and become, no use cohere agent, so good thermal conductivity, the intensity is high, the insulation is strong, as shown in figure 2 (b) as shown. Including aluminum nitride (AlN) of the thermal conductivity for 160 W/mk, thermal expansion coefficient for (and silicon thermal expansion coefficient of quite), which reduces the encapsulation thermal stress.

Research shows that, encapsulation interface to thermal resistance has a very big impact, if can't correctly handle the interface, it will be difficult to get a good cooling effect. For example, good contacts at room temperature of the interface in high temperature may exists between interface, of the substrate warping and could affect the bonding and local heat dissipation. Improve thermal NTC gold electrodes chip/silver electrode wafer packaging lies in reducing interface and interface contact heat resistance, enhance the heat dissipation. Therefore, the chip and thermal hot interface between substrate materials (TIM) choice is very important. NTC thermal gold electrodes chip/silver electrode wafer packaging commonly used for TIM conductive adhesive and thermal conductivity glue, due to the low thermal conductivity, are generally 0.5-2.5 W/mK, cause interface thermal resistance is very high. And low temperature or eutectic solder, or mixed solder paste within the nanoparticles conductive adhesive as a heat interface material that can be greatly reduced interface thermal resistance.